SEALSQ Post-Quantum Patent: Embedding Trust Into Silicon
💡 SEALSQ (WISeKey's semiconductor subsidiary) secured European patent EP26164472 on June 16, 2026, covering the core hardware claims for embedding quantum-resistant digital identity directly into silicon chips. Its parent, EP4174706B1, was granted to WISeKey SA just ten weeks earlier on April 8, 2026. Together these two patents make one foundational bet: post-quantum chip identity is the next mandatory layer of digital trust, and it must be anchored in hardware, not software.
What the Patent Actually Claims
On June 16, 2026, the European Patent Office granted SEALSQ Corp divisional patent EP26164472, the most specific claim to date on what WISeKey calls "Back-to-Physical" technology. Its parent, EP4174706B1, was granted to WISeKey SA on April 8, 2026, under the title "System and method for providing persistent authenticatable non-fungible token." Both patents cover the same core invention: a method to provision a cryptographically unique digital identity directly into a semiconductor chip at the time of manufacture, binding digital identity to physical silicon so inseparably that the chip itself becomes a trust anchor.
The term "non-fungible token" here should not be confused with speculative crypto assets. In this patent, an NFT is a tamper-proof cryptographic certificate, unique to a single piece of hardware, verifiable by any party holding the public key. The divisional EP26164472 focuses on the semiconductor provisioning process: embedding the certificate into the chip itself. A US counterpart application (US 17/514,296) remains pending, extending potential protection to the American market. That pending status means the window for patent translation and multi-jurisdictional filing is still open.
The architecture integrates post-quantum cryptographic (PQC) algorithms alongside WISeKey's Root-of-Trust infrastructure. This is the key technical leap: the chip identity is designed to resist not only current attacks, but also the decryption attacks that become possible once large-scale quantum computers exist. That combination is what makes EP26164472 consequential for the decade ahead.
The Problem It Solves: Trust in a $1.5 Trillion Market
The global semiconductor market is forecast to reach USD 1.51 trillion in 2026, growing approximately 90 percent year-over-year (WSTS, 2026 forecast). Memory chips alone are projected to surge 250 percent, driven by AI data center demand. That scale creates both the opportunity and the vulnerability: the larger and more contested the chip market, the more attractive it becomes to inject counterfeit or tampered components into the supply chain.
Today's authentication relies on software certificates held in external databases. That approach has a structural weakness: if the database is compromised or the software layer is hacked, the chain of trust breaks entirely. A hardware-embedded identity changes the geometry of the problem. The identity is provisioned at the foundry, not added later in software. It travels with the physical chip. It cannot be cloned by copying software, and it does not depend on any server being reachable. This is the hardware root-of-trust concept that the security industry has sought for decades, now formalized in a patent covering the provisioning method itself.
The urgency is structural. AI chip demand is reshaping supply chains at extraordinary speed. Constrained supply of genuine high-end chips creates exactly the conditions where counterfeit parts find their way into safety-critical applications in defense, medical, and automotive electronics. A verifiable chip identity at the hardware level is one of the structural answers to this growing threat.
Why Post-Quantum Cryptography Changes the Stakes
The "post-quantum" element of this patent is not decorative. RSA and elliptic-curve cryptography, which secure most public key infrastructure today, are mathematically vulnerable to Shor's algorithm, which a large-enough fault-tolerant quantum computer can execute efficiently. The US National Institute of Standards and Technology (NIST) finalized its first post-quantum cryptography standards in 2024: FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA). Migration has already started in government and financial sectors.
The timing is not accidental. In June 2026, STMicroelectronics launched the ST54M, described as "the world's first secure mobile chip with post-quantum cryptography," incorporating ML-KEM and ML-DSA hardware accelerators alongside NFC, eSIM, and secure element capabilities. ST noted that industry-wide PQC deployment is "expected to be mandated around 2030." The WISeKey/SEALSQ patent and the ST54M are converging responses from two directions: one anchors identity in the chip, the other accelerates the cryptographic operations protecting it. Both target the same 2030 deployment window.
A hardware root-of-trust built on classical cryptography is, in effect, a clock ticking toward the day quantum decryption becomes feasible. A patent that specifies post-quantum algorithms in the root-of-trust architecture is an attempt to plant a trust anchor that will not be pulled up when the quantum era arrives. Understanding who needs this protection is the next question.
IBM's Verified Quantum Advantage: The Timeline Gets More Credible
Three weeks after this post was first published, IBM and the University of Chicago achieved a milestone that directly sharpens the urgency of hardware-anchored post-quantum identity. On July 30, 2026, they demonstrated verified quantum advantage with 70 error-corrected logical qubits - the first quantum computation simultaneously impossible to replicate classically and provably correct with statistical confidence. Crucially, logical error rates were 10 times lower than physical error rates: error correction is genuinely suppressing noise at meaningful scale.
For hardware security, the implication is concrete: breaking RSA-2048 is estimated to require roughly 4,000 error-corrected logical qubits running millions of operations. IBM demonstrated 70. The gap remains enormous, but the error-correction trajectory is now on a measurably credible path - unlike 2021 when WISeKey filed the original priority application. Concurrently, Google's patent US20260195631 on real-time quantum error decoding covers the hardware decoder layer that makes large-scale error correction practical, closing the loop between qubit hardware and reliable logical computation. Together these developments confirm that the 2030 PQC deadline is an engineering estimate, not an arbitrary policy date. For quantum hardware architecture specifically, Quantinuum's ion-trap switch patent US12689365 addresses the parallel challenge of scaling quantum hardware reliably - a prerequisite for the systems that will eventually run at cryptographically relevant qubit counts.
What It Depends On and What It Could Unlock
For EP26164472 and EP4174706B1 to reach their commercial potential, three conditions need to be met. First, semiconductor manufacturers must integrate the provisioning workflow at the foundry or packaging stage, requiring supply chain agreements with major fabs. Second, the verification ecosystem must standardize, so OEMs, logistics auditors, and platform operators can all read and validate hardware certificates. Third, the US patent application (US 17/514,296) must clear examination, since US market protection is commercially essential.
If those conditions are met, the applications span critical sectors. In automotive and aerospace, hardware-authenticated chips prove provenance in safety-critical systems. In medical devices, verified chip identity supports regulatory traceability from foundry to patient. In industrial IoT, zero-trust network admission can check a device's hardware certificate before it touches the network. And in AI agent economies, where autonomous AI systems will increasingly need to demonstrate which hardware they run on, a hardware-embedded identity becomes a compliance requirement rather than an optional feature.
That last use case is the most forward-looking. As AI agents become autonomous actors in economic transactions, the question "which hardware is this agent running on, and can I verify that independently?" will grow in importance alongside "which model is it?" Hardware chip identity is a foundational answer, and it points directly to who stands to gain and who stands to lose.
Who Is Behind It and Who It Threatens
WISeKey International Holding Ltd is a Swiss digital trust company with a 25-year history in public key infrastructure. SEALSQ Corp (Nasdaq: LAES) is its IoT semiconductor subsidiary, built to translate WISeKey's PKI expertise into physical security chips. The competitive differentiation is the combination: neither a pure chip company nor a pure software trust provider, but an integrated hardware-plus-PKI stack that is difficult for either type of competitor to replicate quickly.
The most directly competitive players are those building alternative hardware security approaches: Infineon Technologies (leading in TPM chips and automotive secure elements), NXP Semiconductors (dominant in NFC and embedded automotive identity), STMicroelectronics (the ST54M is a direct move into this market segment), and the ARM TrustZone ecosystem embedded in almost all modern mobile chips. The WISeKey/SEALSQ patent family's specific claim on semiconductor-embedded PQC identity may carve out a defensible position in the transitional window between classical and post-quantum deployments.
From a geopolitical angle: an EPO patent held by a Swiss entity with a pending US counterpart reflects a calculated multi-jurisdictional IP strategy. Each new jurisdiction adds both protection and translation burden. Precise technical IP translation is not optional at this stage; it is what makes a patent enforceable in each new market.
So What Does It Mean for Us?
The WISeKey/SEALSQ patent family is a precisely placed node in what will become one of the more consequential technology transitions of the late 2020s: the migration of digital trust from software-based classical cryptography to hardware-anchored post-quantum cryptography. EP26164472 and EP4174706B1 do not by themselves make this transition happen, but they define who holds a method patent on a key component of how it will happen.
The commercial window is still open. The US counterpart is pending. The 2030 PQC mandate gives a rough deadline for adoption at scale. What is already clear: anyone operating in semiconductor supply chains, IoT deployment, automotive electronics, or AI infrastructure should understand which method patents are being established in this space right now, because those patents will shape licensing, standards, and competitive dynamics for the decade ahead.
For the IP and localization world: every EPO patent with a pending US counterpart, and the Asian counterpart applications likely to follow, represents a gap that precise patent translation and IP translation services exist to close. The window between European grant and multi-jurisdictional prosecution is exactly where translation quality most directly determines legal enforceability.
Key Patent Facts at a Glance
| Field | EP4174706B1 (Parent) | EP26164472 (Divisional) |
|---|---|---|
| Assignee | WISeKey SA | SEALSQ Corp (Nasdaq: LAES) |
| Jurisdiction | European Patent Office (EPO) | European Patent Office (EPO) |
| Priority date | Oct 2021, Switzerland | Oct 29, 2021 (CH 070467/2021) |
| EPO filing | Oct 6, 2022 | Divisional from EP4174706 |
| Granted | April 8, 2026 | June 16, 2026 |
| Focus | Persistent authenticatable NFTs | Semiconductor chip provisioning |
| US counterpart | US 17/514,296 (pending) | |
FAQ
What is a hardware root of trust and why does it matter?
A hardware root of trust is a cryptographic anchor embedded directly into a chip's hardware at manufacture, not added later in software. Because it cannot be modified after production, it provides a tamper-proof starting point for verifying a device's identity. Software-based trust chains can be hacked or cloned; a properly implemented hardware root of trust cannot be duplicated without physically destroying the chip.
What is the difference between EP4174706B1 and EP26164472?
EP4174706B1 is the parent patent (granted April 2026), covering the broader system for persistent authenticatable NFTs and long-term verification. EP26164472 is the divisional (granted June 2026), focusing specifically on the semiconductor provisioning claims: the method for embedding digital identity into the chip during manufacturing. Both belong to the WISeKey/SEALSQ corporate family.
Why does post-quantum cryptography matter for chip identity?
Standard RSA and elliptic-curve cryptography can be broken by a large-scale quantum computer using Shor's algorithm. If a chip's identity certificate uses classical cryptography, that identity can eventually be forged once quantum computers mature. Post-quantum algorithms like ML-KEM and ML-DSA (NIST FIPS 203/204, 2024) are designed to remain secure against quantum attacks, extending hardware trust anchors into the quantum era.
Is SEALSQ's technology commercially available today?
SEALSQ has moved from pilot to early commercialization. The company reported approximately $11 million in unaudited H1 2026 revenue, more than double the $5 million recorded in H1 2025 (CEO Letter to Shareholders, August 13, 2026). The QS7001 post-quantum secure element obtained NIST SP 800-90B Entropy Source Validation (ESV Certificate #E333) in H1 2026, a mandatory precondition for FIPS certification. Common Criteria hardware evaluation documents are targeted for September and December 2026, with QVault TPM revenue expected in the latter part of 2026. Broader adoption at the foundry level and US patent clearance remain the open conditions for mass-market deployment.
Why does patent translation matter for IP like EP26164472?
A patent is enforceable only in jurisdictions where it has been granted. EP26164472 covers Europe; the pending US application covers the Americas. Filing in Asian semiconductor markets (Japan, South Korea, China) requires separate national applications, each needing precise technical patent translation into the local language. Errors in claim translation can create coverage gaps that competitors can exploit, making rigorous IP translation a legal and commercial necessity.
What did the White House June 2026 executive order require for post-quantum cryptography?
On June 22, 2026, the White House issued Executive Order 14412, "Securing the Nation Against Advanced Cryptographic Attacks," requiring US federal agencies to transition high-value systems to post-quantum cryptographic keys by December 31, 2030, and to PQC digital signatures by end-2031. By October 2026, agencies must submit formal PQC migration plans to the Office of Management and Budget. A proposed Federal Acquisition Regulation amendment will extend these requirements to covered government contractors, converting industry guidance into a binding procurement requirement with direct implications for any semiconductor or security vendor selling into the federal market.
What is SEALSQ planning for quantum-secure satellite infrastructure?
SEALSQ announced a Quantum Spatial Orbital Cloud program, with a first satellite launch contracted with SpaceX for Q4 2026, and plans to expand to up to 100 satellites by 2033. The constellation would extend post-quantum-secure identity and communications infrastructure into orbit, relevant for defense, maritime, and remote IoT applications where terrestrial networks are unavailable or untrusted. The program represents a vertical expansion from chip-level identity provisioning into sovereign orbital infrastructure - each satellite in such a constellation is itself a hardware trust anchor that depends on exactly the kind of provisioning method EP26164472 covers.
Sources
GlobeNewswire: SEALSQ EP26164472 patent grant announcement (June 16, 2026) | Google Patents: EP4174706A1/B1, WISeKey SA parent patent (granted April 8, 2026) | GlobeNewswire: STMicroelectronics ST54M PQC chip launch (June 24, 2026) | WSTS: Global Semiconductor Market Forecast 2026
About the author
Dao Huy (Lucas) is a professional translator with over 7 years of experience in technical, patent, and IP translation from English, Chinese (Mandarin), and French into Vietnamese. He regularly handles semiconductor, electronics, and cybersecurity documentation, where post-quantum cryptography and hardware security patents demand both deep technical understanding and rigorous legal accuracy. A patent like EP26164472 or EP4174706B1 becomes enforceable in a new market only when its claims are rendered with precision: in IP, a mistranslated claim is a gap in protection.
For patent translation, technical IP translation, or software and technology localization into Vietnamese, contact Lucas for a quote: daohuy.com. Serving semiconductor, AI, cybersecurity, automotive, and IoT sectors.
Written by Dao Huy (Lucas), Vietnamese translator & localization specialist (EN · ZH · FR → Vietnamese). See translation services →
